Post Silicon Validation Engineer

We are looking for a highly motivated Post Silicon Validation Engineer to validate complex SoC platforms and silicon products. The ideal candidate should possess strong debugging skills, expertise in embedded software development, silicon bring-up, system validation, and hardware-software integration across advanced semiconductor platforms.

We are looking for a highly motivated Post Silicon Validation Engineer to validate complex SoC platforms and silicon products. The ideal candidate should possess strong debugging skills, expertise in embedded software development, silicon bring-up, system validation, and hardware-software integration across advanced semiconductor platforms.

Location: Bengaluru / Hyderabad

Experience: 3-8 Years

Perform post-silicon validation and characterization of SoC and ASIC products.

Develop and execute validation test plans, test cases, and reporting methodologies.

Debug silicon issues using hardware and software validation techniques.

Work closely with architecture, design, verification, and firmware teams to resolve silicon issues.

Develop Embedded C-based validation and diagnostic software.

Validate processor subsystems, interfaces, buses, NoCs, and IP blocks.

Perform board bring-up and hardware-software integration activities.

Analyze power, performance, and functional KPIs across silicon platforms.

Develop automation scripts and validation frameworks where required.

Support customer issue debugging and root cause analysis.

Execute validation activities on FPGA and emulation platforms before silicon availability.

Document validation findings and drive issue closure with cross-functional teams.

3-8 years of experience in Post Silicon Validation, SoC Validation, or System Validation.

Strong understanding of SoC architecture, Bus/NoC structures, processors, and interface protocols.

Experience in test plan creation, test execution, and validation reporting.

Excellent debugging and root cause analysis skills.

Strong Embedded C programming experience.

Knowledge of scripting languages is an added advantage.

Good understanding of Unix/Linux operating systems and development environments.

Basic understanding of SoC design methodologies and semiconductor development flows.

Knowledge of silicon power management and power optimization techniques.

Hands-on experience with Oscilloscopes, Logic Analyzers, and lab validation equipment.

Strong experience with JTAG-based debugging and validation environments.

Good communication and cross-functional collaboration skills.

Understanding of processor architectures including ARM Cortex-A7, x86, PowerPC, SMP, and heterogeneous multicore systems.

Knowledge of Assembly Language programming and processor-level debugging.

Experience with RTOS, Linux Kernel Internals, scheduling policies, memory management, MMU, and paging concepts.

Experience using JTAG debuggers, compilers, linkers, and embedded toolchains.

Exposure to FPGA Emulation and Pre-Silicon Validation environments is desirable.

Knowledge of software development lifecycle and silicon enablement processes.

Experience in hardware-software bring-up on FPGA/Emulation platforms and fresh silicon.

Understanding of weakly ordered memory models, memory barriers, and cache coherency concepts.

Experience optimizing multi-threaded applications for performance and power efficiency.

Knowledge of ASIC design methodologies is an added advantage.